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The History and Future of RISC - Beaver BarCamp Talk
Jul 15, 2018
2 minutes read

Every year my old employer hosts an “unconference” at Oregon State University. Students and members of industry from around the Willamette Valley (and sometimes beyond) come and visit to give presentations on just about anything. In general, most of the talks are technical in nature (specifically CS topics), but every year there’s always a few outliers, such as tutorials on how to brew the best coffee, AMAs about body piercings and tattoos, or impromptu game sessions of Duck Game.

The previous year, my old mentor pushed me to do a talk, but I didn’t really have anything in mind back then. Over the course of my junior year, a project I was previously aware of but didn’t look to much into really begun to catch my eye; RISCV, the newest RISC project to come out of UC Berkeley, provides an open-source ISA and thus a new initiative towards open-source compute hardware. Being a huge Open Source fan myself (obviously), this project really started to get my attention with this year’s announcement and release of the HiFive Unleashed, which is the first RISCV SoC capable of running Linux.

Reading about RISCV and taking my first course in Computer Architecture this spring got me into researching the history of RISC as a concept, and thus led to me rushing to create an educational talk about the history of RISC and where RISCV aims to take us into the future. Intimidatingly, the talk had a much bigger audience than I expected, with nearly ~25 people crammed into Kelley Engineering Center room 1001. I even had the pleasure of having engineers from the nearby HP Campus come by who were excited to hear about RISCV, given that they have been more or less limited to working on ARM SoCs for over a decade!

Unfortunately, the talk was not recorded, however I’m planning to rework it according to feedback I was given at the event for next year’s BarCamp, and I may have it recorded then. The slides are available here.


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